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Engineer, SoC RTL Engineer

TenstorrentTokyo, Japanالراتب قابل للتفاوضتدريب

الوصف الوظيفي

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Engineer, SoC RTL Engineer We are looking for a Digital Design Engineer to help build and optimize high-performance chiplet-based SoC architectures. This role is ideal for passionate junior engineers or recent graduates who want to grow their career at the intersection of microarchitecture, RTL implementation, and performance/power-aware design. Location: Tokyo, Japan (Hybrid - Flexible working hours and remote work options available) We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Benefits & Work Style at Tokyo Office Competitive Salary: We offer a competitive compensation package aligned with industry standards, your baseline skills, and potential. Flexible Work Culture: To support a healthy work-life balance, we offer flexible working hours (flextime) and remote work options (hybrid style) based out of our Tokyo office. Who You Are An Aspiring Digital Design Engineer: You have a solid foundational understanding of computer architecture and digital logic design. Eager to Learn RTL: You have academic or internship experience in RTL development (SystemVerilog) and are excited to learn the full ASIC flow. PPA Conscious: You understand the basic concepts of optimizing for Power, Performance, and Area (PPA). Collaborative & Curious: You are a natural team player who thrives on learning from peers, participating in code reviews, and asking questions. Problem So lver: You possess strong analytical skills and a desire to tackle complex hardware design challenges. What You Will Do (What We Need) HDL Coding: Utilize hardware description languages (SystemVerilog) to implement and modify custom IP blocks and SoC components under the guidance of senior mentors.

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تاريخ النشر 13‏/7‏/2026
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